Messages in this thread | | | Date | Wed, 3 May 2006 13:37:40 -0700 | From | thockin@hockin ... | Subject | Re: Problems with EDAC coexisting with BIOS |
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On Wed, May 03, 2006 at 09:25:01PM +0100, Tim Small wrote: > existing BIOSs, but the EDAC module could reprogram the chipset > error-signalling registers, so that an ECC error no longer triggers an
This is key, I think.
> SMI. The BIOS SMI handler could then read the signalling registers, and > leave the ECC registers well alone if ECC errors are not set to generate > an SMI.
The fundamental problem with SMI is that we CAN'T know what it is doing. I've seen systems which trigger SMI from a GPIO toggled by a clock. I've seen systems trigger SMI from a chipset-internal periodic timer. I've seen chipsets route NMI->SMI or even MCE->SMI. If the BIOS is polling the error status registers from a periodic SMI, we're GOING to lose data.
The big hammer - turn off SMI - is probably OK on some systems, but is not a general solution. More and more hardware workarounds and features are SMI based. There are some rather interesting things that can be done in SMM, *iff* we could get the BIOS out of the way.
Tim (watching EDAC from time to time, quietly) - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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