Messages in this thread | | | Subject | Re: [PATCH 53 of 53] ipath - add memory barrier when waiting for writes | From | Roland Dreier <> | Date | Mon, 15 May 2006 16:08:03 -0700 |
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ralphc> I don't have a lot to add to this other than I looked at ralphc> the assembly code output for -Os and -O3 and both looked ralphc> OK. I put the mb() in to be sure the writes were complete ralphc> and I found this to work by experimentation. Without it, ralphc> the driver fails to read the EEPROM correctly.
Hmm, that doesn't give me a warm fuzzy feeling. Basically on x86-64 you're adding an unneeded mfence instruction to work around miscompilation?
Is i2c_wait_for_writes miscompiled without the mb() with -Os? What does the bad assembly look like?
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