Messages in this thread | | | Subject | Re: [PATCH] hptiop: HighPoint RocketRAID 3xxx controller driver | From | Arjan van de Ven <> | Date | Mon, 15 May 2006 08:56:35 +0200 |
| |
On Mon, 2006-05-15 at 14:22 +0800, HighPoint Linux Team wrote: > Could you give more explanation about pci posting flush? When (and why) do we need it?
pci posting is where the chipset internally delays (posts) writes (as done by writel and such) to see if more writes will come that can then be combined into one burst. While in practice these queues are finite (and often have a timeout) it's bad practice to depend on that. The simplest way to flush out this posting is to do a (dummy) readl() from the same device. (alternative is to do dma from the device to ram, but readl() is a lot easier ;)
> In an old posting (http://lkml.org/lkml/2003/5/8/278) said pci posting flush is unnecessary - is it correct?
no not really, not as a general statement.
- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
| |