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SubjectRe: [PATCH] i386: PAE entries must have their low word cleared first
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On 26 Apr 2006, at 15:46, Hugh Dickins wrote:

> If that's so (I don't trust my judgement on matters of speculative
> execution), then I think you'd do better to replace the *ptep =
> __pte(0)
> by pte_clear(mm, addr, ptep), and so avoid your ugly #ifdef'ing: please
> check, but I think you'll find that reduces to just the barrier you
> want.
> CC'ed Zach since it's his optimization, and he'll judge that
> spexecution.

In more detail the problem is that, since we're still running on the
page tables while clearing them, the CPU may choose to prefetch a
half-cleared pte into its TLB, and then execute speculative memory
accesses based on that mapping (including ones that may write-allocate
cachelines, leading to problems like the AMD AGP GART deadlock Linux
had a year or so back).

The barrier is needed to ensure that the bottom half is cleared before
the top half. In fact it probably ought to be wmb() -- that's clearer
in intent and actually reduces to barrier() on all PAE-capable
platforms.

We cannot use pte_clear() unless we redefine it for PAE. Currently it
reduces to set_pte() which explicitly uses the wrong ordering (sets
high *then* low, because it's normally used to introduce a mapping).

Also, I think wmb() should be used in PAE's set_pte(), rather than the
current smp_wmb(). They reduce to the same thing, but wmb() makes it
clear this is is not an issue specific to SMP systems.

-- Keir

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