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On Tue, 2006-02-28 at 12:58 -0500, Benjamin LaHaise wrote: > On Tue, Feb 28, 2006 at 09:50:08AM -0800, Bryan O'Sullivan wrote: > > The last 32-bit write triggers the chip to put the packet on the wire. > > We make sure it happens after the earlier bulk write using a barrier. > > The barrier you're looking for is wmb() in asm/system.h, which is defined > on both SMP and UP. No. We're writing to a region that we've marked as write combining, so the processor or north bridge will not write in program order. It's free to write out the write combining store buffers in whatever order it feels like, unless forced to do otherwise. <b - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/ | ||||||||||||
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