Messages in this thread Patch in this message | | | Date | Sat, 18 Feb 2006 23:07:04 +0100 | From | Pierre Ossman <> | Subject | Re: [PATCH 1/2] [PCI] Secure Digital Host Controller id and regs |
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Sergey Vlasov wrote: >> diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h >> index d27a78b..e6deda5 100644 >> --- a/include/linux/pci_regs.h >> +++ b/include/linux/pci_regs.h >> @@ -108,6 +108,9 @@ >> #define PCI_INTERRUPT_PIN 0x3d /* 8 bits */ >> #define PCI_MIN_GNT 0x3e /* 8 bits */ >> #define PCI_MAX_LAT 0x3f /* 8 bits */ >> +#define PCI_SLOT_INFO 0x40 /* 8 bits */ >> +#define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7) >> +#define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07 > > Does this really belong here? This register is specific to the SDHCI > class, while all other definitions in pci_regs.h apply to all PCI > devices. > > drivers/mmc/sdhci.h seems to be a more logical place for SLOT_INFO > definitions. >
Fixed here. (It will be added in a -fix patch for sdhci)
Rgds Pierre
From: Pierre Ossman <drzeus@drzeus.cx>
---
include/linux/pci_regs.h | 3 --- 1 files changed, 0 insertions(+), 3 deletions(-)
diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h index e6deda5..d27a78b 100644 --- a/include/linux/pci_regs.h +++ b/include/linux/pci_regs.h @@ -108,9 +108,6 @@ #define PCI_INTERRUPT_PIN 0x3d /* 8 bits */ #define PCI_MIN_GNT 0x3e /* 8 bits */ #define PCI_MAX_LAT 0x3f /* 8 bits */ -#define PCI_SLOT_INFO 0x40 /* 8 bits */ -#define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7) -#define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07 /* Header type 1 (PCI-to-PCI bridges) */ #define PCI_PRIMARY_BUS 0x18 /* Primary bus number */ | |