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    SubjectRe: CONFIG_NO_HZ: missed ticks, stall (keyb IRQ required) [2.6.18-rc4-mm1]
    On Monday 06 November 2006 15:58, Andreas Mohr wrote:

    > > > How useful would it be to simply disable C2 operation (but not C1)
    > > > in CONFIG_NO_HZ mode after's been determined to kill APIC timer?:

    If the goal is saving power, then disabling dynticks will likely
    be more attractive than disabling C2. Perhaps you can measure it?
    eg. simply run "bltk -I" to measure idle battery life (

    But this is even more true when talking about C3 -- it certainly saves more
    power than dynticks does. This is true for the example system here:

    So given that C3 on every known system that has shipped to date
    breaks the LAPIC timer (and apparently this applies to C2 on these AMD boxes),
    dynticks needs a solid story for co-existing with C3.

    If (HPET re-programming latency is not prohibititive)
    If (there is an HPET/thread)
    then using the HPET/thread instead of the LAPIC timer is the way to go
    else If ( there is an HPET/core, or /package)
    then using the HPET for the timer interrupt to a group of threads
    maybe the way to go. (interrupt needs to be re-sent to the actual
    destination via IPI)
    else if (PIT re-programming latency is not prohibitive)
    then using PIT to cpu0 and IPI to the cpu of interest would work
    The HW isn't well suited to dynticks,
    fall back to a static HZ mode at boot-time.
    Though I suppose that "static HZ" could actually be a variable
    set at boot-time rather than the compile-time scheme we use today.
    Eg. if a box has high-latency C-states, it certainly wants hz<=64
    Boxes with just C1 will not care and would go for hz= faster


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