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    Subject[PATCH] i386 add Intel BTS cpufeature bit and detection (take 2)
    Andi,

    Here is a small patch for i386 which adds a cpufeature flag and
    detection code for Intel's Branch Trace Store (BTS) feature. This
    feature can be found on Intel P4 and Core 2 processors among others.
    It can also be used by perfmon.

    The patch is relative to 2.6.19-rc5-git7 + x86_64-2.6.19-rc5-git7-061116-2

    changelog:
    - add CPU_FEATURE_BTS
    - add Branch Trace Store detection

    signed-off-by: stephane eranian <eranian@hpl.hp.com>

    diff --exclude=.git -urNp linux-2.6.19-rc5-git7-ak.orig/arch/i386/kernel/cpu/intel.c linux-2.6.19-rc5-git7-ak/arch/i386/kernel/cpu/intel.c
    --- linux-2.6.19-rc5-git7-ak.orig/arch/i386/kernel/cpu/intel.c 2006-11-16 05:15:39.000000000 -0800
    +++ linux-2.6.19-rc5-git7-ak/arch/i386/kernel/cpu/intel.c 2006-11-16 05:49:11.000000000 -0800
    @@ -199,6 +199,8 @@ static void __cpuinit init_intel(struct
    if (cpu_has_ds) {
    unsigned int l1;
    rdmsr(MSR_IA32_MISC_ENABLE, l1, l2);
    + if (!(l1 & (1<<11)))
    + set_bit(X86_FEATURE_BTS, c->x86_capability);
    if (!(l1 & (1<<12)))
    set_bit(X86_FEATURE_PEBS, c->x86_capability);
    }
    diff --exclude=.git -urNp linux-2.6.19-rc5-git7-ak.orig/include/asm-i386/cpufeature.h linux-2.6.19-rc5-git7-ak/include/asm-i386/cpufeature.h
    --- linux-2.6.19-rc5-git7-ak.orig/include/asm-i386/cpufeature.h 2006-11-16 05:15:39.000000000 -0800
    +++ linux-2.6.19-rc5-git7-ak/include/asm-i386/cpufeature.h 2006-11-16 05:48:52.000000000 -0800
    @@ -74,6 +74,7 @@
    #define X86_FEATURE_FXSAVE_LEAK (3*32+10) /* FXSAVE leaks FOP/FIP/FOP */
    #define X86_FEATURE_ARCH_PERFMON (3*32+11) /* Intel Architectural PerfMon */
    #define X86_FEATURE_PEBS (3*32+12) /* Precise-Event Based Sampling */
    +#define X86_FEATURE_BTS (3*32+13) /* Branch Trace Store */

    /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
    #define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */
    @@ -138,6 +139,7 @@
    #define cpu_has_ds boot_cpu_has(X86_FEATURE_DS)
    #define cpu_has_pebs boot_cpu_has(X86_FEATURE_PEBS)
    #define cpu_has_clflush boot_cpu_has(X86_FEATURE_CLFLSH)
    +#define cpu_has_bts boot_cpu_has(X86_FEATURE_BTS)

    #endif /* __ASM_I386_CPUFEATURE_H */

    -
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