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SubjectRe: touch_cache() only touches two thirds
FromAndi Kleen <>
Date10 Nov 2006 09:25:51 +0100
"Bela Lubkin" <blubkin@vmware.com> writes:
> 
> /*
>  * Dirty a big buffer in a hard-to-predict (for the L2 cache) way. This
>  * is the operation that is timed, so we try to generate unpredictable
>  * cachemisses that still end up filling the L2 cache:
>  */

The comment is misleading anyways. AFAIK several of the modern
CPUs (at least K8, later P4s, Core2, POWER4+, PPC970) have prefetch 
predictors advanced enough to follow several streams forward and backwards
in parallel.

I hit this while doing NUMA benchmarking for example.

Most likely to be really unpredictable you need to use a
true RND and somehow make sure still the full cache range 
is covered.


-Andi
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