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    SubjectRe: [PATCH 3/6] C-language equivalents of include/asm-*/bitops.h
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    On Wed, Jan 25, 2006 at 10:54:43PM +1100, Keith Owens wrote:
    > Be very, very careful about using these generic *_bit() routines if the
    > architecture supports non-maskable interrupts.
    >
    > NMI events can occur at any time, including when interrupts have been
    > disabled by *_irqsave(). So you can get NMI events occurring while a
    > *_bit fucntion is holding a spin lock. If the NMI handler also wants
    > to do bit manipulation (and they do) then you can get a deadlock
    > between the original caller of *_bit() and the NMI handler.
    >
    > Doing any work that requires spinlocks in an NMI handler is just asking
    > for deadlock problems. The generic *_bit() routines add a hidden
    > spinlock behind what was previously a safe operation. I would even say
    > that any arch that supports any type of NMI event _must_ define its own
    > bit routines that do not rely on your _atomic_spin_lock_irqsave() and
    > its hash of spinlocks.

    At least cris and parisc are using similar *_bit function on SMP.
    I will add your advise in comment.

    --- ./include/asm-generic/bitops.h.orig 2006-01-26 10:56:00.000000000 +0900
    +++ ./include/asm-generic/bitops.h 2006-01-26 11:01:28.000000000 +0900
    @@ -50,6 +50,16 @@ extern raw_spinlock_t __atomic_hash[ATOM
    * C language equivalents written by Theodore Ts'o, 9/26/92
    */

    +/*
    + * NMI events can occur at any time, including when interrupts have been
    + * disabled by *_irqsave(). So you can get NMI events occurring while a
    + * *_bit fucntion is holding a spin lock. If the NMI handler also wants
    + * to do bit manipulation (and they do) then you can get a deadlock
    + * between the original caller of *_bit() and the NMI handler.
    + *
    + * by Keith Owens
    + */
    +
    static __inline__ void set_bit(int nr, volatile unsigned long *addr)
    {
    unsigned long mask = BITOP_MASK(nr);
    -
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