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    SubjectRe: [patch 2/2] powerpc: native atomic_add_unless
    >>Why use a separate register here? Why not reuse %0 instead of using %1? 
    >>Registers are valuable.
    >>
    > You still need to get the output (t) because you need to return
    > whether the operation met with the "unless" case or not. If there is
    > a better way to do this then I'd like to know.

    I was thinking something like this would do:

    static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
    {
    int t;

    __asm__ __volatile__ (
    LWSYNC_ON_SMP
    "1: lwarx %0,0,%1 # atomic_add_unless\n\
    cmpw %0,%3 \n\
    beq- 2f \n\
    add %0,%2,%0 \n"
    PPC405_ERR77(0,%1)
    " stwcx. %0,0,%1 \n\
    bne- 1b \n"
    ISYNC_ON_SMP
    "subf %0,%2,%0 \n\
    2:"
    : "=&r" (t)
    : "r" (&v->counter), "r" (a), "r" (u)
    : "cc", "memory");

    return likely(t != u);
    }

    Though if I could figure out how to get gcc to do it I'd much rather do
    something like this (which won't compile but I think illustrates the concept):

    static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
    {
    int t;

    __asm__ __volatile__ (
    LWSYNC_ON_SMP
    "1: lwarx %0,0,%1 # atomic_add_unless\n\
    cmpw %0,%3 \n\
    beq- 3f \n\
    add %0,%2,%0 \n"
    PPC405_ERR77(0,%1)
    " stwcx. %0,0,%1 \n\
    bne- 1b \n"
    ISYNC_ON_SMP
    2:"
    : "=&r" (t)
    : "r" (&v->counter), "r" (a), "r" (u)
    : "cc", "memory");

    return 1;
    3:
    return 0;
    }
    -
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      Last update: 2006-01-18 22:08    [W:0.055 / U:0.800 seconds]
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