lkml.org 
[lkml]   [2006]   [Jan]   [13]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
SubjectRe: Dual core Athlons and unsynced TSCs
From
Date
On Fri, 2006-01-13 at 10:06 -0800, thockin@hockin.org wrote:
> On Thu, Jan 12, 2006 at 05:17:39PM -0500, Lee Revell wrote:
> > It's been known for quite some time that the TSCs are not synced between
> > cores on Athlon X2 machines and this screws up the kernel's timekeeping,
> > as it still uses the TSC as the default time source on these machines.
> >
> > This problem still seems to be present in the latest kernels. What is
> > the plan to fix it? Is the fix simply to make the kernel use the ACPI
> > PM timer by default on Athlon X2?
>
> If your BIOS has an ACPI "HPET" table, then the kernel can use the HPET
> timer instead. It doesn't solve the problem for apps or other kernel bits
> that use rdtsc directly, but there are other fixes for that floating
> around which will hopefully get consideration when they're mature.
>

The apps can be converted to use clock_gettime(), but that does not help
if the kernel can't keep reasonable time on these machines.

But if we just use "clock=pmtmr" by default on these machines the TSC is
not a problem right?

Lee

-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/

\
 
 \ /
  Last update: 2006-01-13 19:01    [W:0.095 / U:0.732 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site