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On Mon, Sep 26, 2005 at 09:52:45PM -0700, Randy.Dunlap wrote: > "nosmp" (currently) means 1 CPU and no LAPICs/no IOAPICs. ok - ie we ignore HW that may be present. In a way, this makes sense since LAPIC was used for IRQ "load balancing" - ie IRQs could get redirected to another "less busy" CPU. IIRC, discussions about "XPR" should explain how that works. > It doesn't have to be that way, but yes, I suspect that it's > mostly historical, plus a method of getting to a lowest common > hardware boot sequence, which is sometimes nice for debugging > or installation. > > Nevertheless, there is a problem here. What do you suggest > to solve it? Just making PCI_MSI depend on Local APIC support, > or something else? Yeah, my preference would be PCI_MSI only depend on Local APIC. (Note that having a Local APIC implies having an IO APIC as well - but MSI should completely ignore it.) But I don't know enough x86 history to know if thats feasible or not. And I'm not blessed with the time to unravel the x86 APIC support - if the dependencies are necessary, so be it. > [Kernel is assigning MSI interrupts, but then they are "lost." > Using "irqpoll" will find them, but that's a performance penalty.] Interesting. I'm suprised an MSI can get "lost". It implies MSI code is allocating a CPU vector but the vector is not getting enabled/unmasked or the Local APIC is ignoring it. Yeah, we don't want to be using irqpoll for this - entirely defeats the purpose of MSI. thanks, grant - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/ | ||||||||||
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