Messages in this thread Patch in this message | | | Date | Fri, 02 Sep 2005 16:29:10 +1000 | From | Nick Piggin <> | Subject | [PATCH 2.6.13] lockless pagecache 2/7 |
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2/7 Implement atomic_cmpxchg for i386 and ppc64. Is there any architecture that won't be able to implement such an operation?
-- SUSE Labs, Novell Inc.
Introduce an atomic_cmpxchg operation. Implement this for i386 and ppc64.
Signed-off-by: Nick Piggin <npiggin@suse.de>
Index: linux-2.6/include/asm-i386/atomic.h =================================================================== --- linux-2.6.orig/include/asm-i386/atomic.h +++ linux-2.6/include/asm-i386/atomic.h @@ -215,6 +215,8 @@ static __inline__ int atomic_sub_return( return atomic_add_return(-i,v); } +#define atomic_cmpxchg(v, old, new) ((int)cmpxchg(&((v)->counter), old, new)) + #define atomic_inc_return(v) (atomic_add_return(1,v)) #define atomic_dec_return(v) (atomic_sub_return(1,v)) Index: linux-2.6/include/asm-ppc64/atomic.h =================================================================== --- linux-2.6.orig/include/asm-ppc64/atomic.h +++ linux-2.6/include/asm-ppc64/atomic.h @@ -162,6 +162,8 @@ static __inline__ int atomic_dec_return( return t; } +#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n))) + #define atomic_sub_and_test(a, v) (atomic_sub_return((a), (v)) == 0) #define atomic_dec_and_test(v) (atomic_dec_return((v)) == 0) | |