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SubjectRe: question on memory barrier
On Wednesday, August 24, 2005 2:45 pm, Alan Cox wrote:
> And in more detail from the deviceiobook..
> <para>
> In addition to write posting, on some large multiprocessing
> systems
> (e.g. SGI Challenge, Origin and Altix machines) posted writes
> won't
> be strongly ordered coming from different CPUs. Thus it's
> important
> to properly protect parts of your driver that do memory-mapped
> writes
> with locks and use the <function>mmiowb</function> to make
> sure they
> arrive in the order intended. Issuing a regular
> <function>readX </function> will also ensure write ordering, but
> should only be used
> when the driver has to be sure that the write has actually
> arrived
> at the device (not that it's simply ordered with respect to
> other
> writes), since a full <function>readX</function> is a
> relatively expensive operation.
> </para>

Yeah, wrote that too :). io_ordering.txt should probably just get folded
into deviceiobook at some point... Or we could just replace both with
URL pointers to LDD vol. 3. ;)

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