Messages in this thread | | | Subject | Re: I2C block reads with i2c-viapro: testers wanted | From | Krzysztof Halasa <> | Date | Fri, 12 Aug 2005 00:08:32 +0200 |
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Hi,
Jean Delvare <khali@linux-fr.org> writes:
> Partly right. Actually, most SMBus controllers work the following way: > you program a number of registers (typically SMBus transaction type, > target chip address, target register address or command, and the data to > send in the case of a write transaction),
So, with one transaction, can I write an arbitrary number of bytes to the device, and then, in the same transaction, can I read one (or no, or with some controllers, more than one) byte(s) back?
>> But wait, even then does the controller really know anything about >> I^2C commands? How would it differentiate between, say, 8-bit and >> 16-bit reads? Or is it just an 8-bit EEPROM bus? > > No, it is still physically a 2-wire serial bus.
Sure, I rather meant "a bus _for_ I^2C EEPROMs which use 8-bit (+3) addressing".
> The limitation is due to > the fast that the SMBus controller knows of a limited number of > transactions, such as Send Byte, Read Byte, Read Word etc. If the SMBus > controller doesn't know of the SMBus command you want to use (in my > case, I2C block read), then there is no way to do it, because we have no > direct control over the serial line.
Interesting. Still, that limits it to 8-bit-addressable EEPROMs.
Are such things documented somewhere on the net (some datasheet maybe)? -- Krzysztof Halasa - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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