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SubjectRe: [PATCH] i386: Selectable Frequency of the Timer Interrupt
On Thu, Jul 14, 2005 at 12:25:40PM +0200, Krzysztof Halasa wrote:
> Linus Torvalds <torvalds@osdl.org> writes:
>
> > And in short-term things, the timeval/jiffie conversion is likely to be a
> > _bigger_ issue than the crystal frequency conversion.
> >
> > So we should aim for a HZ value that makes it easy to convert to and from
> > the standard user-space interface formats. 100Hz, 250Hz and 1000Hz are all
> > good values for that reason. 864 is not.
>
> Probably only theoretical, and probably the hardware isn't up to it...
> But what if we have:
> - 64-bit jiffies done in hardware (a counter). 1 cycle = 1 microsecond
> or even a CPU clock cycle. Can *APIC or another HPET do that?

HPETs have a fixed frequency (usually 14.31818 MHz, but that depends
on the manufacturer).

> - 64-bit "match timer" (i.e., a register in the counter which fires IRQ
> when it matches the counter value)

That's implemented in the HPET hardware.

> - the CPU(s) sorting the timer list and programming "match timer" with
> software timer next to be executed. Upon firing the timer, a new "next
> to be executed" timer would be programmed into the counter's "match
> timer".
>
> We would have no timer ticks when nobody requested them - the CPUs would
> be allowed to sleep for, say, even 50 ms when no task is RUNNING.

--
Vojtech Pavlik
SuSE Labs, SuSE CR
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