Messages in this thread | | | Date | Thu, 16 Jun 2005 19:49:22 -0400 | From | Brian Gerst <> | Subject | Re: [PATCH 03/04] PCI: use the MCFG table to properly access pci devices (x86-64) |
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Andi Kleen wrote: > On Thu, Jun 16, 2005 at 03:42:23PM -0700, Greg KH wrote: > >>On Thu, Jun 16, 2005 at 03:34:06PM -0700, Rajesh Shah wrote: >> >>>On Tue, Jun 14, 2005 at 10:32:14PM -0700, Greg KH wrote: >>> >>>>+ for (i = 0; i < pci_mmcfg_config_num; ++i) { >>>>+ pci_mmcfg_virt[i].cfg = &pci_mmcfg_config[i]; >>>>+ pci_mmcfg_virt[i].virt = ioremap_nocache(pci_mmcfg_config[i].base_address, MMCONFIG_APER_SIZE); >>> >>>This will map 256MB for each mmcfg aperture, probably better >>>to restrict it based on bus number range for this aperture. >> >>It should be 1MB per bus number, right? > > > It shouldn't make much difference anyways - we have plenty of vmalloc > space on x86-64
What about excess page table usage?
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