Messages in this thread | | | Subject | Re: x86-64: Kernel with large page size | From | Andi Kleen <> | Date | Sat, 11 Jun 2005 11:58:39 +0200 |
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Subrahmanyam Ongole <songole@gmail.com> writes:
> When we run our application on AMD Opteron processors, we are seeing a > large number of L1_AND_L2_DTLB_MISSES. We used oprofile to measure > these numbers. > > We wanted to try with a bigger page size and see if we could bring it > down. TLB caches 4k page translations. I don't know if larger page
You can use large pages in your application by mmaping from a file in hugetlbfs and configuring large pages using sysctl.
> size would even help here.
It probably wouldn't because Opteron has much more 4K DTLB entries than 2M DTLB entries. I have had people trying the opposite from what you tried (using 4K pages for the kernel instead of 2MB), but that also doesn't work right now.
-Andi
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