Messages in this thread | | | Date | Mon, 16 May 2005 09:06:50 +0200 | From | andrea@cpushare ... | Subject | Re: Hyper-Threading Vulnerability |
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On Sun, May 15, 2005 at 03:38:22PM +0200, Mikulas Patocka wrote: > Another possibility to get timing is from direct-io --- i.e. initiate > direct io read, wait until one cache line contains new data and you can be > sure that the next will contain new data in certain time. IDE controller > bus master operation acts here as a timer.
There's no way to do direct-io through seccomp, all the fds are pipes with twisted userland listening the other side of the pipe. So disabling the tsc is more than enough to give to CPUShare users a peace of mind with HT enabled and without having to flush the l2 cache either. CPUShare is the only case I can imagine where an untrusted and random bytecode running at 100% system load is the normal behaviour. - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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