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> I was under the impression that P4 and later processors do not vary the > TSC rate when doing frequency scaling. This is mentioned in the > documentation for the high res timers patch. Prescott and later do not vary TSC, but P4s before that do. On x86-64 it is true because only Nocona is supported which has a pstate invariant TSC. The latest x86-64 kernel has a special X86_CONSTANT_TSC internal CPUID bit, which is set in that case. If some other subsystem uses it I would recommend to port that to i386 too. -Andi - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/ | ||||||||||||||
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