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SubjectRe: about interrupt latency
On Tue, 8 Mar 2005 14:03:21 -0500 (EST), linux-os 
> You can't measure interrupt latency that way even
> though you may get the "correct" answer!

Why do you think the technique is not valid?

> Make a simple module that uses IRQ7, the printer-port
> interrupt. Inside your ISR, you toggle one of the
> printer-port bits. Program the printer port to
> generate the interrupt when its control bit
> is triggered.
>
> Now, connect a function generator to toggle the
> printer control bit. Also use this transition to
> trigger an oscilloscope while looking at its trace
> on one channel. Connect the other channel to the
> bit that's being toggled in your ISR.
>
> Observe the time between the trigger-trace and
> the toggle-trace. That, minus the few nanoseconds
> necessary to execute your ISR code, is the
> interrupt latency when using that specific interrupt
> source. PCI/Bus devices have lower latencies.

I do not have such an instrumentation :-(

>
> The CPU speed seems to have little to do with interrupt
> latency now that we have fast CPUs. The limiting action
> is the memory speed (front-side bus). You can seldom
> count on having your ISR code inside the cache, so it
> needs to be fetched. It also takes more cache-flushes
> to switch from user-mode to a kernel stack, set up
> new segments, etc. That's the reason why you must
> MEASURE the latency if it is important. Guessing that
> an interrupt occurred when a timer went to zero, then
> measuring the residual in that same ISR will give you
> the wrong answers, altough in this case, it's probably
> close.
>
Sorry but i cannot understand this:
i'm trying to estimate interrupt latency (i need only the order of
magnitude) by measuring the interrupt latency of the timer interrupt.
So when the 8254 counter reaches zero it issues an interrupt so i'm
sure that the time when the interrupt has been issued was when the
counter was to zero. From that time the counter returns to a value of
19832 (or something else) and at that time the countdown restarts.
When i reach the ISR i read the counter and obtain the
latency...what's wrong in this simple strategy?
Probably i'm guessing that the latency experienced by a timer
interrupt is the same as e.g the latency experienced by a NIC
interrupt, but remember that i need only a coarse measure.

Nevertheless, the information about the ISR in cache is very
interesting, probably it's what i was looking for....thank u.
Francesco Oppedisano
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