Messages in this thread |  | | | Subject | Re: Parallel ATA with libata status with the patches I'm working on | | From | Alan Cox <> | | Date | Sun, 06 Nov 2005 20:41:31 +0000 |
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On Sad, 2005-11-05 at 08:50 +1100, Benjamin Herrenschmidt wrote: > OK, but my question why, what is the reason why we need IRQ mask ? Some > old non-PCI controllers can't grok un-related ISA IO cycles during a > FIFO read/write ? I suppose those would be broken on SMP too (though I > suspect then that those don't exist as SMP machines then :)
There are PCI controllers that are hosed too. They incorrectly handle the situation where the PCI fifo empties/fills and the controller should indicate to the drive to stall the transfer. The chipsets I know that are afflicted with this are all uniprocessor mainboard devices.
Alan
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