Messages in this thread |  | | | Date | Thu, 24 Nov 2005 11:09:08 -0800 | | From | thockin@hockin ... | | Subject | Re: [patch] SMP alternatives |
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On Thu, Nov 24, 2005 at 03:15:24PM +0000, Alan Cox wrote: > The Intel I have looked at generates MCE if the L2/L1/bus parity errors > but not on a RAM ECC error as that is memory controller not CPU level. > That usually asserts NMI. Same for most older chips PIII/AMD Athlon etc Some BIOSes route that into SMI. The BIOS can then log the error and tell the OS via the nmi_now bit. Uggh. - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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