Messages in this thread | | | Date | Fri, 28 Oct 2005 21:34:08 +0100 | From | David Vrabel <> | Subject | Re: [PATCH] 2.6.14-rc3 ixp4xx_copy_from little endian/alignment |
| |
John Bowler wrote: > >>Also, I've noticed that the PCI_CSR is mis-configured when the XScale >>core is in little-endian mode. ABE (AHB is big-endian) /must/ always be >>set -- remember that the NPEs are always big-endian devices. > > > This doesn't affect the flash (we've verified that - i.e. *with* the > patch the flash works in LE regardless of the patch for the PCI_CSR > setting).
Now that you mention it I do remember seeing this patch floating around.
>>Since I'd never run an IXP4xx in little-endian mode I've not looked at >>this issue in any great depth so I could be wrong here. Regardless, the >>proposed hack to the flash map driver is wrong since all expansion bus >>peripherals are affected not just flash (i.e., the solution needs to be >>more generic rather than flash driver specific). > > > No, that's incorrect. The patch has been demonstrated to be correct with > all devices (along with the PCI_CSR patch, which Deepak has already pushed > upstream). I.e. *without* the patch everything works (BE and LE) except > the flash is unuseable, *with* the patch the flash works too.
It appears that the NSLU2 only has the flash on the expansion bus which is why you believe it's a flash specific problem.
> So I'm effectively saying we need data coherency in the flash, but what we > have in everything *else* is working just find with address coherency.
Data coherency can be set on a per 1 Mibyte page basis so all other (APB and PCI) peripherals would continue to use address coherency and thus would continue to function as they are now.
David Vrabel - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
| |