Messages in this thread |  | | | Date | Fri, 28 Jan 2005 05:43:01 +0100 | | From | Ingo Molnar <> | | Subject | Re: High resolution timers and BH processing on -RT |
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* Thomas Gleixner <tglx@linutronix.de> wrote:
> Some numbers to make this more transparent. > > Machine: PIII Celeron 333MHz > RT - T0: 1ms cyclic > RT - T1: 2ms cyclic > .... > > Load average is ~4.0 for all tests. The numbers are maximum deviation > from the timeline in microseconds. Test time was ~60 minutes for each > szenario. > > Running all timers in high resolution mode (ksoftirqd) results in: > [T0 Prio: 60] 2123 > [T1 Prio: 59] 2556 > [T2 Prio: 58] 2882 > [T3 Prio: 57] 2993 > [T4 Prio: 56] 2888 > > Running all timers in high resolution mode (seperated timer softirqd > PRIO=70) results in: > [T0 Prio: 60] 423 > [T1 Prio: 59] 372 > [T2 Prio: 58] 756 > [T3 Prio: 57] 802 > [T4 Prio: 56] 1208
is this due to algorithmic/PIT-programming overhead, or due to the noise introduced by other, non-hard-RT timers? I'd guess the later from the looks of it, but did your test introduce such noise (via networking and application workloads?).
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