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SubjectRe: multi-domain PCI and sysfs
Another part I don't understand... PCI VGA hardware is designed to
respond to IN/OUT instructions to port space. ppc64/ia64 don't have
IN/OUT port instructions. Is there some special hardware on ppc64/ia64
that declares part of the PCI IO space "legacy space" and turns
read/writes there into IN/OUT port cycles on the PCI bus so that the
legacy hardware can see the accesses?

On machines without this "legacy space" translation hardware (ie all
32b x86 bit machines) I can only have a single VGA adapter active
since there is only a single legacy space and inb/outb are real
instructions.

On machines with "legacy space" translation I can have one active VGA
card per translator. How do I know how many translators there are? Is
only one per domain/segment allowed?

How does ppc32 handle VGA port instructions, is the "legacy
translation" space at the bottom of the PCI address space?

I looked at io.h on IA64, how do apps select which legacy IO space
they are using? Now I see add_io_space() and related code.

Maybe it's not a good idea to have a 32b x86 person writing this
driver. Is there a cross platform structure that corresponds to IO
spaces?


--
Jon Smirl
jonsmirl@gmail.com
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