Messages in this thread | | | Date | Thu, 30 Sep 2004 23:21:39 +0200 (CEST) | From | Guennadi Liakhovetski <> | Subject | Re: [PATCH] I/O space write barrier |
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On Thu, 30 Sep 2004, Jeremy Higdon wrote:
> Here's the qla1280 patch to go with Jesse's mmiowb patch. > Comments are verbose to satisfy a request from Mr. Bottomley. > > signed-off-by: Jeremy Higdon <jeremy@sgi.com> > > ===== drivers/scsi/qla1280.c 1.65 vs edited ===== > --- 1.65/drivers/scsi/qla1280.c 2004-07-28 20:59:10 -07:00 > +++ edited/drivers/scsi/qla1280.c 2004-09-29 23:43:30 -07:00 > @@ -3397,8 +3397,22 @@ > "qla1280_64bit_start_scsi: Wakeup RISC for pending command\n"); > sp->flags |= SRB_SENT; > ha->actthreads++; > + > + /* > + * Update request index to mailbox4 (Request Queue In). > + * The mmiowb() ensures that this write is ordered with writes by other > + * CPUs. Without the mmiowb(), it is possible for the following: > + * CPUA posts write of index 5 to mailbox4 > + * CPUA releases host lock > + * CPUB acquires host lock > + * CPUB posts write of index 6 to mailbox4 > + * On PCI bus, order reverses and write of 6 posts, then index 5, > + * causing chip to issue full queue of stale commands > + * The mmiowb() prevents future writes from crossing the barrier. > + * See Documentation/DocBook/deviceiobook.tmpl for more information. > + */
A pretty obvious note: instead of repeating this nice but pretty lengthy comment 3 times in the same file, wouldn't it be better to write at further locations something like
/* Enforce IO-ordering. See comment in <function> for details. */
Also helps if you later have to modify the comment, or move it, or add more mmiowb()s, or do some other modifications.
Thanks Guennadi --- Guennadi Liakhovetski
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