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SubjectG5 and IO accesses
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Hi !

I've heard in the past that people had trouble getting PCI cards
with IO ports (inX/outX) to work on G5s... looking at the setup code
today, it looks like I had a bogus base address when setting it up,
can somebody with such a card confirm that it works with this patch ?

===== arch/ppc64/kernel/pmac_pci.c 1.10 vs edited =====
--- 1.10/arch/ppc64/kernel/pmac_pci.c 2004-09-28 11:47:33 +10:00
+++ edited/arch/ppc64/kernel/pmac_pci.c 2004-09-28 16:41:24 +10:00
@@ -419,7 +419,7 @@
* properties or figuring out the U3 address space decoding logic and
* then read it's configuration register (if any).
*/
- hose->io_base_phys = 0xf4000000 + 0x00400000;
+ hose->io_base_phys = 0xf4000000;
hose->io_base_virt = ioremap(hose->io_base_phys, 0x00400000);
isa_io_base = pci_io_base = (unsigned long) hose->io_base_virt;
hose->io_resource.name = np->full_name;

-
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