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    Subjectpage fault scalability patch V8: [3/7] atomic pte operations for ia64
    Changelog
    * Provide atomic pte operations for ia64
    * Enhanced parallelism in page fault handler if applied together
    with the generic patch

    Signed-off-by: Christoph Lameter <clameter@sgi.com>

    Index: linus/include/asm-ia64/pgalloc.h
    ===================================================================
    --- linus.orig/include/asm-ia64/pgalloc.h 2004-09-18 14:25:23.000000000 -0700
    +++ linus/include/asm-ia64/pgalloc.h 2004-09-18 15:43:25.000000000 -0700
    @@ -34,6 +34,10 @@
    #define pmd_quicklist (local_cpu_data->pmd_quick)
    #define pgtable_cache_size (local_cpu_data->pgtable_cache_sz)

    +/* Empty entries of PMD and PGD */
    +#define PMD_NONE 0
    +#define PGD_NONE 0
    +
    static inline pgd_t*
    pgd_alloc_one_fast (struct mm_struct *mm)
    {
    @@ -78,12 +82,19 @@
    preempt_enable();
    }

    +
    static inline void
    pgd_populate (struct mm_struct *mm, pgd_t *pgd_entry, pmd_t *pmd)
    {
    pgd_val(*pgd_entry) = __pa(pmd);
    }

    +/* Atomic populate */
    +static inline int
    +pgd_test_and_populate (struct mm_struct *mm, pgd_t *pgd_entry, pmd_t *pmd)
    +{
    + return ia64_cmpxchg8_acq(pgd_entry,__pa(pmd), PGD_NONE) == PGD_NONE;
    +}

    static inline pmd_t*
    pmd_alloc_one_fast (struct mm_struct *mm, unsigned long addr)
    @@ -132,6 +143,13 @@
    pmd_val(*pmd_entry) = page_to_phys(pte);
    }

    +/* Atomic populate */
    +static inline int
    +pmd_test_and_populate (struct mm_struct *mm, pmd_t *pmd_entry, struct page *pte)
    +{
    + return ia64_cmpxchg8_acq(pmd_entry, page_to_phys(pte), PMD_NONE) == PMD_NONE;
    +}
    +
    static inline void
    pmd_populate_kernel (struct mm_struct *mm, pmd_t *pmd_entry, pte_t *pte)
    {
    Index: linus/include/asm-ia64/pgtable.h
    ===================================================================
    --- linus.orig/include/asm-ia64/pgtable.h 2004-09-18 14:25:23.000000000 -0700
    +++ linus/include/asm-ia64/pgtable.h 2004-09-18 15:43:25.000000000 -0700
    @@ -423,6 +423,19 @@
    extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
    extern void paging_init (void);

    +/* Atomic PTE operations */
    +static inline pte_t
    +ptep_xchg (struct mm_struct *mm, pte_t *ptep, pte_t pteval)
    +{
    + return __pte(xchg((long *) ptep, pteval.pte));
    +}
    +
    +static inline int
    +ptep_cmpxchg (struct vm_area_struct *vma, unsigned long addr, pte_t *ptep, pte_t oldval, pte_t newval)
    +{
    + return ia64_cmpxchg8_acq(&ptep->pte, newval.pte, oldval.pte) == oldval.pte;
    +}
    +
    /*
    * Note: The macros below rely on the fact that MAX_SWAPFILES_SHIFT <= number of
    * bits in the swap-type field of the swap pte. It would be nice to
    @@ -558,6 +571,7 @@
    #define __HAVE_ARCH_PTEP_MKDIRTY
    #define __HAVE_ARCH_PTE_SAME
    #define __HAVE_ARCH_PGD_OFFSET_GATE
    +#define __HAVE_ARCH_ATOMIC_TABLE_OPS
    #include <asm-generic/pgtable.h>

    #endif /* _ASM_IA64_PGTABLE_H */
    -
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