Messages in this thread | | | Subject | Re: [patch] sched: fix scheduling latencies in mtrr.c | From | Alan Cox <> | Date | Tue, 14 Sep 2004 14:15:23 +0100 |
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On Maw, 2004-09-14 at 14:25, Ingo Molnar wrote: > caveat: one of the wbinvd() removals is correct i believe, but the other > one might be problematic. It doesnt seem logical to do a wbinvd() at > that point though ...
See the intel ppro manual volume 3 page 11-25. Its quite specific about the sequence, so unless anything changes with AMD or later processors the change seems to match the description.
IRQs are required to be off far longer than this sequence according to the docs however, and PGE is supposed to be cleared too.
Step 11: set CD flag Step 12: wbinvd Step 13: set pge in CR4 if previously cleared
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