Messages in this thread | | | Subject | Re: [patch] voluntary-preempt-2.6.9-rc1-bk4-Q5 | From | Andi Kleen <> | Date | Wed, 01 Sep 2004 01:06:02 +0200 |
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Ingo Molnar <mingo@elte.hu> writes:
> The question is, does any of the Intel (or AMD) docs > say that the CPU cache has to be write-back flushed when setting MTRRs, > or were those calls only done out of paranoia?
Both the Intel and AMD docs require the cache flush for MTRR caching attribute changes.
At least in pageattr (which is related) i know of cases where not doing them caused data corruption in real loads.
-Andi
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