Messages in this thread | | | Date | Thu, 08 Jul 2004 11:03:24 +0200 | From | Helge Hafting <> | Subject | Re: MSI to memory? |
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Roland Dreier wrote:
> Helge> Won't that put a bad load on the bus? Someone else might > Helge> need it: * Another cpu in a smp system * Any device doing > Helge> bus-master transfers, even in a UP system > >Actually with MSI, the PCI device writes directly to a host address. >In the proposed usage in this mail thread, the address is in host >memory, so there's no bus load to poll the memory. Presumably the >memory will be pulled into cache for the duration of the poll loop, so >there's not even any memory bandwidth consumed. (Of course this only >works on an architecture where PCI DMA is cache coherent) > > I see. Still, this should only be used when we expect a short wait only, similiar to situations when we use a spinlock. Otherwise, the cpu could be put to better use by scheduling.
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