Messages in this thread Patch in this message | | | Date | Thu, 24 Jun 2004 07:55:44 -0500 | From | Jack Steiner <> | Subject | Re: [PATCH] - Reduce TLB flushing during process migration |
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On Wed, Jun 23, 2004 at 02:33:18PM -0700, Andrew Morton wrote: > Jack Steiner <steiner@sgi.com> wrote: > > > > This patch adds a platform specific hook to allow an arch-specific > > function to be called after an explicit migration. > > OK by me. David, could you please merge this up? > > Jack, please prepare an update for Documentation/cachetlb.txt.
Signed-off-by: Jack Steiner <steiner@sgi.com>
--- linuxbase/Documentation/cachetlb.txt 2004-06-22 07:15:46.000000000 -0500 +++ linux/Documentation/cachetlb.txt 2004-06-24 07:54:50.000000000 -0500 @@ -132,6 +132,17 @@ translations for software managed TLB configurations. The sparc64 port currently does this. +7) void tlb_migrate_finish(struct mm_struct *mm) + + This interface is called at the end of an explicit + process migration. This interface provides a hook + to allow a platform to update TLB or context-specific + information for the address space. + + The ia64 sn2 platform is one example of a platform + that uses this interface. + + Next, we have the cache flushing interfaces. In general, when Linux is changing an existing virtual-->physical mapping to a new value, the sequence will be in one of the following forms: -- Thanks
Jack Steiner (steiner@sgi.com) 651-683-5302 Principal Engineer SGI - Silicon Graphics, Inc.
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