Messages in this thread |  | | | Date | Wed, 2 Jun 2004 03:30:27 -0700 | | From | Mitchell Blank Jr <> | | Subject | Re: e1000 question |
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Ihar 'Philips' Filipau wrote: > Functions e1000_clean_{t,r}x_irq are very similar: both of them are > checking descriptor flag updated by nic. > Host CPU, obviously, to perform this check, will cache descriptor. > If, say e1000_clean_rx_irq() will be called twice in short time > range, I expect that it can miss change of the flag, since old flag may > still sit in host CPU cache.
Please see Documentation/DMA-mapping.txt; especially the part starting at "There are two types of DMA mappings..." Ring buffers are allocated as "consistent" DMA memory.
For most architectures this will mean that the cache hardware snoops the PCI bus and automatically invalidates cache lines as they are written to. For architectures that can't do that then Linux will mark those memory regions uncacheable.
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