Messages in this thread | | | Subject | Re: IO-APIC on nforce2 [PATCH] + [PATCH] for nmi_debug=1 + [PATCH] for idle=C1halt, 2.6.5 | From | Len Brown <> | Date | 21 Apr 2004 18:00:16 -0400 |
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On Thu, 2004-04-15 at 19:07, Andi Kleen wrote: > Len Brown <len.brown@intel.com> writes: > > > While I don't want to get into the business of maintaining > > a dmi_scan entry for every system with this issue, I think > > it might be a good idea to add a couple of example entries > > for high volume systems for which there is no BIOS fix available. > > Or do a generic fix: check for the PCI-ID of the Nforce2 and when > it is true and the timer is wrong just correct it. That's ugly, > but it's probably the best solution for such a common issue > (and the IO-APIC code is already filled with workarounds anyways)
IMO the fact that the IOAPIC code is full of workarounds is a reason NOT to add another one.
> One problem is that this likely must happen before the PCI quirks > run. In the x86-64 code I have special "early PCI scanning" code > for this that could be copied. I don't have a Nforce2, but when > someone is willing to test I can do a patch for this.
If this issue had no other fix, I'd agree that the complexity is worth it. But a BIOS upgrade fixes this -- so I think dmi-scan simplicity is the way to go.
-Len
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