Messages in this thread | | | Subject | Re: Fast 64-bit atomic writes (SSE?) | From | Roland Dreier <> | Date | 20 Mar 2004 06:43:34 -0800 |
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Andi> Definitely not how you do it ;-) You corrupt the user space Andi> FPU context. Also you didn't do a CPUID check, so it would Andi> just crash on machines
I'm not an asm expert, so could you explain how it corrupts the FPU context? I tried to save off the value of the XMM register I used, and the docs I have say that the movq and movdq instructions don't affect any flags.
As far as the CPUID, you're right... I left that part of the code out but I am definitely planning on using this only if the machine has SSE2.
Andi> The RAID code has some examples on how to use SSE2 in the Andi> kernel correctly.
Hmm, they save cr0 and do a clts, and then restore cr0 when they're done. For my education, can you explain why?
Andi> Better is probably to use CMPXCHG8, which avoids all of Andi> this.
OK, thanks.
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