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SubjectRe: consistent_sync_for_cpu() and friends on ppc32
On Tue, 16 Mar 2004 11:23:42 +1100
Benjamin Herrenschmidt <> wrote:

> BTW, I missed your explanation in the first place, but why wouldn't
> the "direction" field be enough ? I'm not sure if I need a different
> implementation here...

Direction says something different. It says which direction the DMA
goes, whilst these interfaces say who wishes to have ownership of the
buffer now.

Consider this example, and how one might implement this on a system with
cpu caches which are not coherent with main memory nor devices.

1) User prepares buffer X with data.
2) pci_map_single(X, TO_DEVICE)
3) Device does DMA, interrupts cpu.
4) pci_dma_sync_single_for_cpu(X)
5) Write new contents.
6) pci_dma_sync_single_for_device(X)
7) Device does DMA again, interrupts cpu.
8) ...

Step 2 would writeback flush the cpu cache, step 4 would be a NOP,
step 6 would writeback flush the cpu cache.

The direction does not provide enough information to do these operations
with the right amount of information.
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