Messages in this thread | | | Date | Sun, 29 Feb 2004 17:52:13 +0800 | From | "Michael Frank" <> | Subject | Re: Why no interrupt priorities? |
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On Sun, 29 Feb 2004 09:36:57 +0100, Arjan van de Ven <arjanv@redhat.com> wrote:
> On Sun, Feb 29, 2004 at 04:32:54PM +0800, Michael Frank wrote: >> >> Most interrupt controllers can read back IRQ's to see whether it is >> active. A shared IRQ would be readback active while any device >> connected to it desires service. >> >> x86 example for 8259A AT-PIC's Returns the state of IRQ0-15 in ax >> Note that jmp $+2 is only needed on some old 286/386 hardware >> to meet (real) 8259A cycle time requirements. >> >> - Intel syntax :) >> >> mov al,0ah >> out 0a0h,al >> jmp $+2 >> in al,0a0h >> mov ah,al >> mov al,0ah >> jmp $+2 >> out 20h,al >> jmp $+2 >> in al,20h > > interesting; however with modern cpus I suspect that a series of in/outs > like that is more expensive than one or two "surious" hardirq handler > calls... >
Yes, Four 8259A IO cycles would take almost 2us, which is several 1000 instructions worth of burning electricity.
Racehorse is still best at going straight :)
However on-chipset PIC's may be better and in on-CPU APICs should be much better in this regard, but I have not studied data(sheet).
Regards Michael
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