Messages in this thread Patch in this message |  | | | Subject | [PATCH] ppc64: fix a bug in iSeries MMU hash management | | From | Benjamin Herrenschmidt <> | | Date | Fri, 27 Feb 2004 18:00:13 +1100 |
Hi !
iSeries HyperVisor is doing some evilery when inserting PTEs that I didn't properly account for when rewriting that code, causing iSeries box to blow up regulary.
Here's a fix.
===== arch/ppc64/kernel/pSeries_htab.c 1.11 vs edited ===== --- 1.11/arch/ppc64/kernel/pSeries_htab.c Mon Jan 19 17:28:25 2004 +++ edited/arch/ppc64/kernel/pSeries_htab.c Fri Feb 27 17:05:05 2004 @@ -103,7 +103,7 @@ __asm__ __volatile__ ("ptesync" : : : "memory"); - return i; + return i | (secondary << 3); } static long pSeries_hpte_remove(unsigned long hpte_group) ===== arch/ppc64/kernel/pSeries_lpar.c 1.29 vs edited ===== --- 1.29/arch/ppc64/kernel/pSeries_lpar.c Mon Feb 16 18:30:46 2004 +++ edited/arch/ppc64/kernel/pSeries_lpar.c Fri Feb 27 17:08:28 2004 @@ -369,7 +369,10 @@ if (lpar_rc != H_Success) return -2; - return slot; + /* Because of iSeries, we have to pass down the secondary + * bucket bit here as well + */ + return (slot & 7) | (secondary << 3); } static spinlock_t pSeries_lpar_tlbie_lock = SPIN_LOCK_UNLOCKED; ===== arch/ppc64/mm/hash_low.S 1.3 vs edited ===== --- 1.3/arch/ppc64/mm/hash_low.S Thu Feb 12 15:32:56 2004 +++ edited/arch/ppc64/mm/hash_low.S Fri Feb 27 17:08:49 2004 @@ -176,7 +176,6 @@ beq- htab_pte_insert_failure /* Now try secondary slot */ - ori r30,r30,_PAGE_SECONDARY /* page number in r5 */ rldicl r5,r31,64-PTE_SHIFT,PTE_SHIFT @@ -215,8 +214,8 @@ b htab_insert_pte htab_pte_insert_ok: - /* Insert slot number in PTE */ - rldimi r30,r3,12,63-14 + /* Insert slot number & secondary bit in PTE */ + rldimi r30,r3,12,63-15 /* Write out the PTE with a normal write * (maybe add eieio may be good still ?)
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