Messages in this thread | | | Date | Fri, 29 Oct 2004 11:48:56 -0400 | From | Timothy Miller <> | Subject | Re: Some discussion points open source friendly graphics [was: HARDWARE: Open-Source-Friendly Graphics Cards -- Viable?] |
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linux-os wrote: > On Wed, 27 Oct 2004, Daniel Phillips wrote: > >> On Monday 25 October 2004 18:45, Timothy Miller wrote: >> >>> My intention is to include a bit of logic in the FPGA which can be used >>> to reprogram the prom. You would then cycle power to get the FPGA to >>> load the new code. >> >> >> Power cycle the whole machine, or software-reset the card? >> >> Regards, >> >> Daniel > > > The FPGA requires a physical reset-pin toggle to load new > bits into the gate-array. This could be software-toggled, > but that would require at least one external gate. This > is because the power-reset needs to reset the chip before > its bits are loaded plus some pin, after loading, needs to > be an output to its reset pin also. Therefore, you need > the external gate that is always present.
Generally speaking, more chips == bad. If reprogramming the FPGA were a regular event, I'd see the point, but I hope that MOST users would NEVER have to reprogram it.
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