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SubjectRe: [RFC] Relaxed PIO read vs. DMA write ordering
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On Thu, Jan 08, 2004 at 11:13:47PM -0800, Jeremy Higdon wrote:
> In theory, such a distinction would be useful for any platform that
> uses separate paths for PIO read responses and DMA writes. Perhaps
> there is only one platform that has that feature?

Well, the big MIPS boxes behave this way too. Ralf and Christoph, what
do you think? The current PCI DMA mapping API is insufficient for
Origin and other Bridge/Hub boxes, although I don't think there's any
way to implement pci_sync_consistent() on Origin unless there happens to
be an extra interrupt line available for each PCI slot. That would
allow the arch code to generate a DMA write barrier (by forcing an
interrupt as we do on sn2) that would force previous DMA into the
coherence domain before it completed.

Jesse
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