Messages in this thread | | | Date | 6 Jan 2004 05:05:46 +0100 | Date | Tue, 6 Jan 2004 05:05:46 +0100 | From | Andi Kleen <> | Subject | Re: PCI memory allocation bug with CONFIG_HIGHMEM |
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On Mon, Jan 05, 2004 at 07:40:11PM -0800, Linus Torvalds wrote: > > > On Tue, 6 Jan 2004, Andi Kleen wrote: > > > > IMHO the only reliable way to get physical bus space for mappings > > is to allocate some memory and map the mapping over that. > > You literally can't do that: the RAM addresses are decoded by the > northbridge before they ever hit the PCI bus, so it's impossible to "map > over" RAM in general.
Are you sure? I have a doc from AMD somewhere on the memory ordering on K8 and it gives this order: (highest to lowest)
AGP aperture, TSEG, ASEG, IORR, Fixed MTRR, TOP_MEM
Note that TOP_MEM comes last, IORR comes earlier. It would require setting an IORR though, which would be admittedly a bit nasty (there are not that many of them). As long as it is only a single area it should be possible though, we already have some code to change IORRs in the AGP driver. That would be admittedly AMD specific, but I suspect Intel has a similar mechanism.
I have successfully mapped the AGP aperture over RAM and also seen it shadowing PCI mappings. I admit I haven't tried it with PCI mappings.
But can you suggest a reliable way to find a memory hole in e820? I haven't one figured out and AFAIK there isn't even any guarantee by the BIOS that there is any. e.g. Opteron BIOS tend to use all the precious space < 4GB up for existing mappings and I would expect other i386 BIOS to behave the same.
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