Messages in this thread | | | Date | Sun, 7 Sep 2003 15:40:20 +0200 | From | Pavel Machek <> | Subject | Re: x86, ARM, PARISC, PPC, MIPS and Sparc folks please run this |
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Hi!
Perhaps weak ordering matters when you are writting to the MMIO, too?
> > Wow, seems interesting, how much performance does it buy? [Maybe AMD > > and Intel just threw a lot of silicon at the problem and it went > > away. Centaur solution might be nicer, through -- spin_unlock is so > > uncommon that this seems like nice optimalization.] > > I didn't realise Centaur SMP systems existed, but I guess they must do > for weak memory writes to mean anything. > > -- Jamie
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