Messages in this thread | | | Subject | Re: [2.4 patch] fix CONFIG_X86_L1_CACHE_SHIFT | From | Andi Kleen <> | Date | 07 Sep 2003 22:30:52 +0200 |
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Adrian Bunk <bunk@fs.tum.de> writes:
> With CONFIG_M686 CONFIG_X86_L1_CACHE_SHIFT was set to 5, but a Pentium 4 > requires 7.
It doesn't require 7, it just prefers 7.
> The patch below does: > - set CONFIG_X86_L1_CACHE_SHIFT 7 for all Intel processors (needed for > the Pentium 4) > - set CONFIG_X86_L1_CACHE_SHIFT 6 for the K6 (needed for the Athlon)
I think these changes should be only done with CONFIG_X86_GENERIC is set.
Otherwise the people who want kernels really optimized for their CPUs won't get the full benefit. On UP it does not make that much difference, but on a SMP kernel having a bigger than needed cache size wastes a lot of memory.
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