Messages in this thread | | | Date | Sat, 16 Aug 2003 17:39:52 +0300 (EEST) | From | Kai Makisara <> | Subject | Re: [BUG] slab debug vs. L1 alignement |
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On Sat, 16 Aug 2003, Benjamin Herrenschmidt wrote:
... > THe low level driver can't do the bounce buffer thing, it has to be > done at higher layers. > Agreed. A high-level driver must be able to handle this anyway because of other constraints. The point is that this costs cpu cycles and bouncing should be avoided if possible.
> > If an architecture has restrictions, they must, of course, be taken into > > account. However, this should not punish architectures that don't have the ... > > sizes. This would mean adding two more masks for each device (like the > > current DMA address mask for a device). > > That won't help for buffers coming from higher layers that don't know > the device they'll end up to > Agreed. This just enables the high-level driver to avoid bouncing. For instance, in a P4 system it is usually not necessary to require 128 byte alignment for DMA.
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