Messages in this thread |  | | | Date | Tue, 01 Jul 2003 13:59:26 -0600 | | From | Alex Williamson <> | | Subject | Re: [RFC] block layer support for DMA IOMMU bypass mode |
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Grant Grundler wrote: > > But I'm pretty sure james proposal will work for ia64 and parisc. >
The thing that's got me concerned about this is that it allows for sg lists that contains both entries that the block layer expects will be mapped into the iommu and ones that it expects to bypass. I don't like the implications of parsing through sg lists looking for bypass-able and non-bypass-able groupings. This seems like a lot more overhead than we have now and the complexity of merging partially bypass-able scatterlists seems time consuming.
The current ia64 sba_iommu does a quick and dirty sg bypass check. If the device can dma to any memory address, the entire sg list is bypassed. If not, the entire list is coalesced and mapped by the iommu. The idea being that true performance devices will have 64bit dma masks and be able to quickly bypass. Everything else will at least get the benefit of coalescing entries to make more efficient dma. The coalescing is a bit simpler since it's the entire list as well. With this proposal, we'd have to add a lot of complexity to partially bypass sg lists. I don't necessarily see that as a benefit. Thanks,
Alex
-- Alex Williamson HP Linux & Open Source Lab - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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