Messages in this thread | | | Date | Fri, 6 Jun 2003 16:06:35 +0400 | From | Ivan Kokshaysky <> | Subject | Re: PCI cache line messages 2.4/2.5 |
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On Thu, Jun 05, 2003 at 05:23:54PM +0200, Margit Schubert-While wrote: > With what (if any) consequences under 2.4 ? > Shouldn't it be fixed for 2.4.21 ?
More likely for early 2.4.22-pre. In the worst case you'd end up enabling MWI with cacheline size = 0, which should be a no-op on any sane hardware.
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