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    SubjectRe: Spurious 8259A Interrupt IRQ 7
    Also, I am not sure how the IO-APIC & IRQ routing work, however, with the
    ATA/100 TX1 (first generation promise controller, the interrupts are
    shared differently.

    Whether this makes a difference or has anything to do with the spurious
    interrupts/messages, I am not sure.

    Before:

    # cat /proc/interrupts
    CPU0
    0: 6486628 XT-PIC timer
    1: 6 XT-PIC keyboard
    2: 0 XT-PIC cascade
    4: 647546 XT-PIC serial
    5: 0 XT-PIC Crystal audio controller
    8: 1 XT-PIC rtc
    9: 3548883 XT-PIC eth2, eth3
    11: 2601852 XT-PIC ide2, ide3, eth0, eth1
    12: 38 XT-PIC PS/2 Mouse
    14: 121950 XT-PIC ide0
    15: 25 XT-PIC ide1
    NMI: 0
    LOC: 6486487
    ERR: 11
    MIS: 0

    After:

    CPU0
    0: 22081 XT-PIC timer
    1: 6 XT-PIC keyboard
    2: 0 XT-PIC cascade
    4: 2061 XT-PIC serial
    5: 0 XT-PIC Crystal audio controller
    8: 1 XT-PIC rtc
    9: 4233 XT-PIC eth2, eth3
    10: 37 XT-PIC ide2, ide3
    11: 2071 XT-PIC eth0, eth1
    12: 38 XT-PIC PS/2 Mouse
    14: 6037 XT-PIC ide0
    15: 24 XT-PIC ide1
    NMI: 0
    LOC: 22032
    ERR: 0
    MIS: 0

    Now to see if I get any more of these spurious interrupts...

    On Sun, 22 Jun 2003, Alan Cox wrote:

    > IRQ7 is raised if an interrupt appears and then vanishes again before it
    > can be serviced. For 2.4.20/21 at least it can occur from the IDE layer
    > and maybe others
    >
    >
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