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William Lee Irwin III writes: > Same address mapped differently on different cpus is what I thought > you meant. It does make sense, and besides, it only really matters > when the thing is being switched in, so I think it's not such a big > deal. e.g. mark per-thread mm context with the cpu it was prepped for, > if they don't match at load-time then reset the kernel pmd's pgd entry > in the per-thread pgd at the top level. x86 blows away the TLB at the Having to have a pgdir per thread would be a bit sucky, wouldn't it? On PPCs with the hash-table based MMU, if we wanted to do different mappings of the same address on different CPUs, we would have to have a separate hash table for each CPU, which would chew up a lot of memory. On PPC64 machines with logical partitioning, I don't think the hypervisor would let you have a separate hash table for each CPU. On the flip side, PPC can afford a register to point to a per-cpu data area more easily than x86 can. > The vmallocspace bit is easier, though the virtualspace reservation > could get uncomfortably large depending on how much is crammed in there. > That can go node-local also. I guess it has some runtime arithmetic > overhead vs. the per-cpu TLB entries in exchange for less complex code. I was thinking of something like 64kB per cpu times 32 cpus = 2MB. Anyway, 32-bit machines with > 8 cpus are a pretty rare corner case. On 64-bit machines we have enough virtual space to give each cpu gigabytes of per-cpu data if we want to. Paul. - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/ | ||||||||||||
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